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      "name": "VBAT",
      "length": {
       "a": 0,
       "b": 0,
       "delta": 0,
       "perLayer": {}
      },
      "width": {
       "min": {
        "a": null,
        "b": null
       },
       "max": {
        "a": null,
        "b": null
       },
       "perLayer": {}
      },
      "copperArea": {
       "a": 3638.192273079,
       "b": 3705.345801032,
       "delta": 67.153527953,
       "perLayer": {
        "F.Cu": {
         "a": 1756.297878271,
         "b": 1783.939857903,
         "delta": 27.641979631
        },
        "B.Cu": {
         "a": 1881.894394808,
         "b": 1921.40594313,
         "delta": 39.511548322
        }
       },
       "note": "pour (region) area only"
      },
      "vias": {
       "a": 191,
       "b": 191,
       "delta": 0,
       "drills": {
        "a": {
         "0.4": 191
        },
        "b": {
         "0.4": 191
        }
       },
       "drillDelta": {}
      },
      "pads": {
       "a": 43,
       "b": 43,
       "added": [],
       "removed": []
      },
      "reroutedLengthMm": {
       "removed": 0,
       "added": 0
      },
      "viasMoved": {
       "removed": 0,
       "added": 0
      },
      "rerouted": false
     }
    ]
   },
   "outline": {
    "changed": false,
    "loops": {
     "a": 1,
     "b": 1
    },
    "bbox": {
     "a": [
      50,
      47,
      150,
      122
     ],
     "b": [
      50,
      47,
      150,
      122
     ]
    },
    "size": {
     "a": [
      100,
      75
     ],
     "b": [
      100,
      75
     ]
    },
    "perimeterMm": {
     "a": 350,
     "b": 350,
     "delta": 0
    },
    "areaMm2": {
     "a": 7500,
     "b": 7500,
     "delta": 0
    },
    "changedLengthMm": {
     "removed": 0,
     "added": 0
    }
   },
   "stackup": {
    "changed": false,
    "added": [],
    "removed": [],
    "modified": [],
    "reordered": false,
    "thickness": null
   },
   "warnings": []
  },
  "bomDiff": {
   "summary": {
    "added": 0,
    "removed": 0,
    "qtyChanged": 0,
    "valueChanged": 1,
    "footprintChanged": 0,
    "mpnChanged": 0,
    "dnpToggled": 0,
    "categoryChanged": 0,
    "total": 1,
    "unchanged": 215
   },
   "added": [],
   "removed": [],
   "qtyChanged": [],
   "valueChanged": [
    {
     "kind": "value-changed",
     "category": "SCH",
     "key": "vf:10k|r_0603_1608metric",
     "part": {
      "value": "10k",
      "footprint": "Resistor_SMD:R_0603_1608Metric"
     },
     "from": "1M",
     "to": "10k",
     "refs": [
      "R47",
      "R48",
      "R49",
      "R50",
      "R51",
      "R52"
     ]
    }
   ],
   "footprintChanged": [],
   "mpnChanged": [],
   "dnpToggled": [],
   "categoryChanged": [],
   "byCategory": {
    "SCH": {
     "valueChanged": 1
    },
    "PCB": {},
    "BOARD_FEATURE": {}
   }
  },
  "impacts": [
   {
    "id": "13dc5de57b4002ac",
    "kind": "bom",
    "ref": "R47",
    "refs": [
     "R47",
     "R48",
     "R49",
     "R50",
     "R51",
     "R52"
    ],
    "category": "SCH",
    "metric": "value",
    "before": "1M",
    "after": "10k",
    "delta": null,
    "severity": "info",
    "why": "SCH line 10k R_0603_1608Metric: R47, R48, R49, R50, R51, R52 value changed (1M -> 10k).",
    "causes": [
     "bomDiff.valueChanged[R47]",
     "bomDiff.valueChanged[R48]",
     "bomDiff.valueChanged[R49]",
     "bomDiff.valueChanged[R50]",
     "bomDiff.valueChanged[R51]",
     "bomDiff.valueChanged[R52]"
    ],
    "assumptionDependent": false
   }
  ],
  "summary": {
   "counts": {
    "high": 0,
    "medium": 0,
    "low": 0,
    "info": 1
   },
   "headline": "1 informational change(s), none against a limit; first: SCH line 10k R_0603_1608Metric: R47, R48, R49, R50, R51, R52 value changed (1M -> 10k).",
   "markdown": "**1 informational change(s), none against a limit; first: SCH line 10k R_0603_1608Metric: R47, R48, R49, R50, R51, R52 value changed (1M -> 10k).** Layout: components: 27 with a new value; nets: 11 changed, 2 rerouted. BOM: 1 changed value. Re-analysed on both revisions, for the changed nets and parts only: impedance, cert, returnPath. Not run for missing inputs: cert.creepage (see refused)."
  },
  "analysed": {
   "ran": [
    "impedance",
    "cert",
    "returnPath"
   ],
   "nets": [
    "/AL_GATESIG",
    "/AU_GATESIG",
    "/BL_GATESIG",
    "/BU_GATESIG",
    "/CL_GATESIG",
    "/CU_GATESIG",
    "GND",
    "HIN_A",
    "HIN_B",
    "HIN_C",
    "LIN_A",
    "LIN_B",
    "LIN_C",
    "Net-(NT1-Pad1)",
    "Net-(NT3-Pad1)",
    "Net-(NT5-Pad1)",
    "Net-(QA1-Pad1)",
    "Net-(QA2-Pad1)",
    "Net-(QA3-Pad1)",
    "Net-(QA4-Pad1)",
    "Net-(QA5-Pad1)",
    "Net-(QA6-Pad1)",
    "Net-(QB1-Pad1)",
    "Net-(QB2-Pad1)",
    "Net-(QB3-Pad1)",
    "Net-(QB4-Pad1)",
    "Net-(QB5-Pad1)",
    "Net-(QB6-Pad1)",
    "Net-(QC1-Pad1)",
    "Net-(QC2-Pad1)",
    "Net-(QC3-Pad1)",
    "Net-(QC4-Pad1)",
    "Net-(QC5-Pad1)",
    "Net-(QC6-Pad1)",
    "Net-(U1-VB)",
    "Net-(U2-VB)",
    "Net-(U3-VB)",
    "PHASE_A",
    "PHASE_B",
    "PHASE_C",
    "V12V",
    "V3V3",
    "V5V",
    "VBAT"
   ],
   "rails": []
  },
  "assumptions": {
   "before": [
    {
     "source": "default",
     "analysis": "impedance",
     "key": "mask.er",
     "value": 3.8,
     "citation": "LPI solder mask epsilon_r 3.8 (NativeCAD default)",
     "verified": false,
     "affects": [
      "outer-layer traces"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "fab",
     "value": "jlcpcb",
     "citation": "fab profile jlcpcb (NativeCAD default)",
     "verified": true,
     "affects": []
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipc6012.drillPositionTolMm",
     "value": 0.075,
     "unit": "mm",
     "citation": "NativeCAD default (typical standard-technology rigid fab; no fab publishes it)",
     "verified": false,
     "affects": [
      "ipc6012"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipc6012.innerRegistrationTolMm",
     "value": 0.075,
     "unit": "mm",
     "citation": "NativeCAD default (typical standard-technology rigid fab; no fab publishes it)",
     "verified": false,
     "affects": [
      "ipc6012"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipc6012.outerRegistrationTolMm",
     "value": 0.05,
     "unit": "mm",
     "citation": "NativeCAD default (typical standard-technology rigid fab; no fab publishes it)",
     "verified": false,
     "affects": [
      "ipc6012"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipcClass",
     "value": "2",
     "citation": "IPC-6012 Class 2 (dedicated service) - the general commercial default",
     "verified": true,
     "affects": []
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "motC",
     "value": 105,
     "citation": "requested MOT 105 C (FR-4 laminates' common UL RTI)",
     "verified": false,
     "affects": [],
     "unit": "C"
    },
    {
     "source": "default",
     "analysis": "returnPath",
     "key": "erEff",
     "value": 4,
     "citation": "effective epsilon_r 4 for the stitching distance (NativeCAD default)",
     "verified": false,
     "affects": []
    },
    {
     "source": "derived",
     "analysis": "returnPath",
     "key": "planes",
     "value": [
      "In1.Cu:GND",
      "In2.Cu:GND"
     ],
     "citation": "inner layer with >= 30 % pour cover of one net (outer: >= 80 % and no other net's traces); voids = holes >= 2 mm^2 in that net's pours, as bounding rectangles",
     "affects": [
      "every finding"
     ]
    },
    {
     "source": "default",
     "analysis": "returnPath",
     "key": "riseTimeNs",
     "value": 1,
     "citation": "edge rise time 1 ns, f_knee = 0.35 / t_r (Johnson & Graham)",
     "verified": true,
     "affects": [],
     "unit": "ns"
    }
   ],
   "after": [
    {
     "source": "default",
     "analysis": "impedance",
     "key": "mask.er",
     "value": 3.8,
     "citation": "LPI solder mask epsilon_r 3.8 (NativeCAD default)",
     "verified": false,
     "affects": [
      "outer-layer traces"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "fab",
     "value": "jlcpcb",
     "citation": "fab profile jlcpcb (NativeCAD default)",
     "verified": true,
     "affects": []
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipc6012.drillPositionTolMm",
     "value": 0.075,
     "unit": "mm",
     "citation": "NativeCAD default (typical standard-technology rigid fab; no fab publishes it)",
     "verified": false,
     "affects": [
      "ipc6012"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipc6012.innerRegistrationTolMm",
     "value": 0.075,
     "unit": "mm",
     "citation": "NativeCAD default (typical standard-technology rigid fab; no fab publishes it)",
     "verified": false,
     "affects": [
      "ipc6012"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipc6012.outerRegistrationTolMm",
     "value": 0.05,
     "unit": "mm",
     "citation": "NativeCAD default (typical standard-technology rigid fab; no fab publishes it)",
     "verified": false,
     "affects": [
      "ipc6012"
     ]
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "ipcClass",
     "value": "2",
     "citation": "IPC-6012 Class 2 (dedicated service) - the general commercial default",
     "verified": true,
     "affects": []
    },
    {
     "source": "default",
     "analysis": "cert",
     "key": "motC",
     "value": 105,
     "citation": "requested MOT 105 C (FR-4 laminates' common UL RTI)",
     "verified": false,
     "affects": [],
     "unit": "C"
    },
    {
     "source": "default",
     "analysis": "returnPath",
     "key": "erEff",
     "value": 4,
     "citation": "effective epsilon_r 4 for the stitching distance (NativeCAD default)",
     "verified": false,
     "affects": []
    },
    {
     "source": "derived",
     "analysis": "returnPath",
     "key": "planes",
     "value": [
      "In1.Cu:GND",
      "In2.Cu:GND"
     ],
     "citation": "inner layer with >= 30 % pour cover of one net (outer: >= 80 % and no other net's traces); voids = holes >= 2 mm^2 in that net's pours, as bounding rectangles",
     "affects": [
      "every finding"
     ]
    },
    {
     "source": "default",
     "analysis": "returnPath",
     "key": "riseTimeNs",
     "value": 1,
     "citation": "edge rise time 1 ns, f_knee = 0.35 / t_r (Johnson & Graham)",
     "verified": true,
     "affects": [],
     "unit": "ns"
    }
   ]
  },
  "refused": {
   "before": [
    {
     "analysis": "cert.creepage",
     "reasonCode": "pcb_analysis_needs_input",
     "needs": [
      "cert.pairs[].a",
      "cert.pairs[].b",
      "cert.pairs[].workingVrms"
     ],
     "remedy": "creepage needs the net pairs and the working voltage between them; UL 796 and IPC-6012 ran without them",
     "requested": false
    }
   ],
   "after": [
    {
     "analysis": "cert.creepage",
     "reasonCode": "pcb_analysis_needs_input",
     "needs": [
      "cert.pairs[].a",
      "cert.pairs[].b",
      "cert.pairs[].workingVrms"
     ],
     "remedy": "creepage needs the net pairs and the working voltage between them; UL 796 and IPC-6012 ran without them",
     "requested": false
    }
   ]
  }
 }
}